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Eran Cohen (US citizen) Work History: NFTI Corp. Jul/02-Now (Consulted for Texas Instruments (Twice), Intel, Broadcom (Twice), MentorGraphics, Lecroy, Rosum , FyreStorm, Ambarella (Twice), Altierre, Novafora, EnvisionTech, IPSIL, OcarinaTech, Exalt Communications, IncelVision, W5 Networks, and others) Morphics Technology Inc. Mar/2001-Jun/2002 PC-Tel Inc. Dec/1998-Feb/2001 ITeX Inc. Jan/1998-Nov/1998 Terayon Communications Systems Dec/1994-Jan/1998 AT&T Bell Labs Nov/1992-Nov/1994 National Semi Conductor Feb/1986-Nov/1992
Experience/Accomplishments: - Completed numerous chips from concept to production. Had hands on key roles in the development, functional verification, synthesis, FPGA prototypes for system verification, coverage analysis , formal verification (Equivalency, assertions), timing verification and DFT (BIST, scan, IDDQ). Self starter and independent. - Lots of experience with DSP, communications, PHY, video and other applications, especially low power. - Added IP protection to an Arm based sophisticated audio filtering system. - Designed and verified CFR (Crest Factor Reduction) and DPD (Digital PreDistortion) blocks for a wireless infrastructure ASSP. Both blocks were about 3M gates together, and made about ½ of the ASIC. Lots of attention was given to low power. - Integrated Bluetooth Physical layer into Bluetooth protocol analyzer. - Participated in the design of UWB (Wireless USB) Modem (ASIC), back-haul wireless transceiver (Altera Stratix 3 FPGA), multi gigabits TCP/IP DDR HW, RFID and Graphic processor chipset, SW defined Video processor chip, and more. - Led the design and verification of a 14M gate chip for 3GPP cellular base stations in Morphics. - Designed and verified a positioning ASIC and FPGA (Xilinx Virtex 2Pro) based on TV signals (PAL/NTSC/DTV). Developed pre tapeout and post silicon verification plans. - Developed a rendering engine and LCD controllers. Setup and executed verification strategy, environment, and test plan. - Developed test plan and executed the verification of major blocks of a H.264/MPEG/JPEG Encoder Decoder ASIC. - Designed and verified 2 broadband ADSL/V.90 ASICs, FPGA prototypes and boards for system verification in PC-Tel. - Led the design and verification of a 1M gate ADSL in ITeX. - Led (hands on) the design and verification of a S-CDMA (DOCSIS 1.2) cable Modem ASIC, including silicon bring up and supporting SW and HW integration and verification. - Designed and verified the Signal Processing Engine, the heart of a very successful xDSL modem chip set developed in AT&T Bell Labs department, which was later spun off as Globe Span. - Conducted DSP simulations and LAN modeling for a LAN transceiver ASIC in Bell Labs. (100/10Mbps Ethernet, FDDI, and ATM). Filed 2 related patents. - Designed and verified a chip-set for 100/10Mbps fast Ethernet transceiver. - Architected the digital chip for 10GB Ethernet over copper w/ XAUI & XFI I/F, and 1GB mode w/ GMII I/F. - Implemented a V.32bis modem transmitter and echo canceller. Developed verification strategy and detailed plan. - Implemented a UDP/TCP/IP TOE in FPGA (Xilinx Virtex), which could reach Tera bits per second. - Participated in the development and verification of various CISCs & DSPs in National Semi Conductor.
Education: - MSEE, 1988 – Technion, Israel. - BSCE, 1985 (Cum Laude) – Technion, Israel.
Other Design tools & Skills: Verilog RTL, SystemVerilog, PLI, Synopsys, BC, Behavioral Synthesis, VCS, NC-Verilog, Vericov, Covermeter, Prime-time, Spyglass, Synplicity, ISE, Quartos, ChipScope, signalScan, Ambit (BuildGates), Verplex/Tuxedo, Cadence/SPW, Matlab & Simulink, Verisity/Specman, Vera, SyetemVerilog, Tetramex, Mentor/Fastscan, Syntest, HDL-Score, TransEDA, AtHDL, Novas Debussy & Verdi, Virsim, Orcad, Unix/Solaris, Windows, C, Assembler, Xilinx Virtex, Altera Stratix-III, Arm, AMBA, AHB, Microblaze, OpenRisc, DW8051, master/target PCI bus, DMA, Codec I/F, DDR1, DDR2, DDR3, FEC (ReedSolomon, Trellis, Viterbi), modulation (CAP, QAM, CAP, OFDM), DSP (FFT, IFFT, FIR, IIR, Bi-Quad, raised cosine shaping filters, matched filters, Decimation, Interpolation, Carrier recovery, Clock recovery, AGC, blind/noise predictive/adaptive equalizers, THP), wireless, G.lite, G.dmt, SAR, SERDES, 802.11, 802.16, WiFi, WiMAX, Bluetooth, CFR, DPD, ATSC. |
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